Here is an example Makefile that illustrates advanced features of make (e.g. automatic dependency tracking; implicit rules):
# An example Makefile
# The C++ compiler - this variable is used in the implicit rule for producing
# N.o from N.cc (or N.C)
CXX = g++
# The C compiler - this is used in two implicit rules:
# - the rule for producing N.o from N.c
# - the rule to link a single object file.
CC = gcc
# Preprocessor flags
CPPFLAGS = # -DNDEBUG when the debugging code as given in section 8.3
# has to be turned of
# We split up the compiler flags for convenience.
# Warning flags for C programs
WARNCFLAGS = -Wall -W -Wshadow -Wpointer-arith -Wbad-function-cast \
-Wcast-qual -Wcast-align -Wstrict-prototypes -Wmissing-prototypes \
-Wmissing-declarations
# Warning flags for C++ programs
WARNCXXFLAGS = $(WARNCFLAGS) -Wold-style-cast -Woverloaded-virtual
# Debugging flags
DBGCXXFLAGS = -g
# Optimisation flags. Usually you should not optimise until you have finished
# debugging, except when you want to detect dead code.
OPTCXXFLAGS = # -O2
# CXXFLAGS is used in the implicit rule for producing N.o from N.cc (or N.C)
CXXFLAGS = $(WARNCXXFLAGS) $(DBGCXXFLAGS) $(OPTCXXFLAGS)
# The linker flags and the libraries to link against.
# These are used in the implicit rule for linking using a single object file;
# we'll use them in our link rule too.
LDFLAGS = -g
# Use Electric Fence to track down memory allocation problems.
LOADLIBES = -lefence
# The program to build
PROGRAMS = ourprogram
# All the .cc files
SOURCES = $(wildcard *.cc)
# And the corresponding .o files
OBJECTS = $(SOURCES:.cc=.o)
# The first target in the makefile is the default target. It's usually called
# "all".
all: depend TAGS $(PROGRAMS)
# We assume we have one program (`ourprogram') to build, from all the object
# files derived from .cc files in the current directory.
ourprogram: $(OBJECTS)
$(CC) $(LDFLAGS) -o ourprogram $(OBJECTS) $(LOADLIBES)
# "clean" removes files not needed after a build.
clean:
rm -f $(OBJECTS)
# "realclean" removes everything that's been built.
realclean: clean
rm -f $(PROGRAMS) .depend TAGS
# "force" forces a full rebuild.
force:
$(MAKE) realclean
$(MAKE)
# "depend" calculates the dependencies.
depend:
rm -f .depend
$(MAKE) .depend
# This is the actual dependency calculation.
.depend: $(SOURCES)
rm -f .depend
# For each source, let the compiler run the preprocessor with the -M and -MM
# options, which causes it to output a dependency suitable for make.
for source in $(SOURCES) ; do \
$(CC) $(CPPFLAGS) -M -MM $$source | tee -a .depend ; \
done
# Include the generated dependencies.
ifneq ($(wildcard .depend),'')
include .depend
endif
# Produce a `TAGS' file for (x)emacs to use for browsing the source code.
TAGS: $(SOURCES)
etags -o TAGS --typedefs-and-c++ $(SOURCES)
# Tell make that "all" etc. are phony targets, i.e. they should not be confused
# with files of the same names.
.PHONY: all clean realclean force depend